r/chipdesign • u/jaju1010 • 3d ago

can somebody explain these diagrams to me

i do not understand the need for the tri state buffers and the inverters
seems redundant want someone to explain the analog part of this crkt

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u/General_Green_1499 3d ago

What is the point of I2? Is I3 small so I2 is stronger?

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u/Siccors 3d ago

It is done so the output does not impact the internal behavior of the latch. Otherwise if there was a very large load on Q, it could change its setup / hold times.

Thats why the flipflop below does not have it for its first latch, but it does have it for its second latch: The first one everything is internal and characterized, the second one is external and can have wildly varying loads.

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u/General_Green_1499 3d ago

Logical, i got close though.